PEB 3324 HL V1.4 IC TELECOM INTERFACE 176-LQFP Price in Pakistan

Operating Voltage: 4.5V to 5V Advanced RISC Architecture. 32 x 8 General Purpose Working Registers. Fully Static Operation. Up to 16 MIPS Throughput at 16 MHz. On-chip 2-cycle Multiplier. High Endurance Non-volatile Memory segments. 32 Kbytes of In-System Self-programmable Flash program memory. 1024 Bytes EEPROM. 2 Kbyte Internal SRAM. Write/Erase Cycles: 10,000 Flash/100,000 EEPROM. Data retention: 20 years at 85°C/100 years at 25°C(1). Optional Boot Code Section with Independent Lock Bits. In-System Programming by On-chip Boot Program. True Read-While-Write Operation. Programming Lock for Software Security. Extensive On-chip Debug Support. 8 Single-ended Channels. Byte-oriented Two-wire Serial Interface. Programmable Serial USART. Master/Slave SPI Serial Interface. Programmable Watchdog Timer with Separate On-chip Oscillator.