Low-voltage and Standard-voltage Operation
2.7 (VCC = 2.7V to 5.5V)
1.8 (VCC = 1.8V to 5.5V)
Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),
1024 x 8 (8K) or 2048 x 8 (16K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
100 kHz (1.8V) and 400 kHz (2.7V, 5V) Compatibility
Write Protect Pin for Hardware Data Protection
8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes
Partial Page Writes Allowed
Self-timed Write Cycle (5 ms max)
High-reliability
Endurance: 1 Million Write Cycles
Data Retention: 100 Years
Automotive Devices Available
8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2×3), 5-lead SOT23, 8-lead TSSOP and 8-ball dBGA2 Packages
Die Sales: Wafer Form, Waffle Pack and Bumped Wafers
-28%
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PIC 18F46K22
Sleep mode: 100 nA, typical
Watchdog Timer: 500 nA, typical
Timer1 Oscillator: 500 nA @ typical 32 kHz Flexible Oscillator Structure
Precision 16 MHz internal oscillator block:
Factory calibrated to 1%
Software selectable frequencies range of 31 kHz to 16 MHz
64 MHz performance available using PLL
No external components required
Four Crystal modes up to 64 MHz
Two external Clock modes up to 64 MHz
4X Phase Lock Loop (PLL)
Secondary oscillator using Timer1 @ 32 kHz
Fail-Safe Clock Monitor: Allows for safe shutdown if peripheral clock stops
Two-Speed Oscillator Start-up
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